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1 ? HFA1105 330mhz, low power, current feedback video operational amplifier the HFA1105 is a high speed, low power current feedback amplifier built with intersil?s proprietary complementary bipolar uhf-1 process. this amplifier features an e xcellent combination of low power dissipation (58mw) and high performance. the slew rate, bandwidth, and low output impedance (0.08 ? ) make this amplifier a good choice for driving flash adcs. component and composite video systems also benefit from this op amp?s excellent gain flatness, and good differential gain and phase specifications. the HFA1105 is ideal for interfacing to intersil?s line of video crosspoint switches (ha4201, ha4600, ha4314, ha 4404, ha4344), to create high performance, low power switchers and routers. the HFA1105 is a low power, high performance upgrade for the clc406. for a comparable am plifier with output disable or output limiting functions, please see the data sheets for the hfa1145 and hfa1135 respectively. for military grade product, plea se refer to the hfa1145/883 data sheet . ordering information note: requires a soic-to-dip adapt er. see ?evaluation board? section inside. features ? low supply current . . . . . . . . . . . . . . . . . . . . . . . . 5.8ma ? high input impedance . . . . . . . . . . . . . . . . . . . . . . . 1m ? ? wide -3db bandwidth. . . . . . . . . . . . . . . . . . . . . . 330mhz ? very fast slew rate . . . . . . . . . . . . . . . . . . . . . 1000v/ s ? gain flatness (to 75mhz) . . . . . . . . . . . . . . . . . . . 0.1db ? differential gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.02% ? differential phase. . . . . . . . . . . . . . . . . . . . . 0.03 degrees ? pin compatible upgrade for clc406 applications ? flash a/d drivers ? video switching and routing ? professional video processing ? video digitizing boards/systems ? multimedia systems ?rgb preamps ? medical imaging ? hand held and miniaturized rf equipment ? battery powered communications pinout HFA1105 (soic) top view part number (brand) temp. range ( o c) package pkg. dwg. # HFA1105ib (h1105i) -40 to 85 8 ld soic m8.15 hfa11xxeval (note) dip evaluation board for high speed op amps nc -in +in v- 1 2 3 4 8 7 6 5 nc v+ out nc - + data sheet may 2003 fn3395.7 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2003. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 absolute maximum rati ngs thermal information supply voltage (v+ to v-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11v dc input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v supply differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8v output current (note 1) . . . . . . . . . . . . . . . . . short circuit protected 30ma continuous 60ma 50% duty cycle esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>600v temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . -40 o c to 85 o c thermal resistance (typical, note 2) ja ( o c/w) soic package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 maximum junction temperature (die). . . . . . . . . . . . . . . . . . . .175 o c maximum junction temperature (plastic package) . . . . . . . .150 o c maximum storage temperature range . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c (lead tips only) caution: stresses above those listed in ?abs olute maximum ratings? may cause permanent dam age to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. notes: 1. output is short circuit protected to gr ound. brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output current must not exceed 30ma for maximum reliability. 2. ja is measured with the component mount ed on an evaluation pc board in free air. electrical specifications v supply = 5v, a v = +1, r f = 510w, r l = 100w, unless otherwise specified parameter test conditions (note 3) test level temp. ( o c) min typ max units input characteristics input offset voltage a 25 - 2 5 mv afull-38mv average input offset voltage drift b full - 1 10 v/ o c input offset voltage common-mode rejection ratio ? v cm = 1.8v a 25 47 50 - db ? v cm = 1.8v a 85 45 48 - db ? v cm = 1.2v a -40 45 48 - db input offset voltage power supply rejection ratio ? v ps = 1.8v a 25 50 54 - db ? v ps = 1.8v a 85 47 50 - db ? v ps = 1.2v a -40 47 50 - db non-inverting input bias current a 25 - 6 15 a a full - 10 25 a non-inverting input bias current drift b full - 5 60 na/ o c non-inverting input bias current power supply sensitivity ? v ps = 1.8v a 25 - 0.5 1 a/v ? v ps = 1.8v a 85 - 0.8 3 a/v ? v ps = 1.2v a -40 - 0.8 3 a/v non-inverting input resistance ? v cm = 1.8v a 25 0.8 1.2 - m ? ? v cm = 1.8v a 85 0.5 0.8 - m ? ? v cm = 1.2v a -40 0.5 0.8 - m ? inverting input bias current a 25 - 2 7.5 a afull-515 a inverting input bias current drift b full - 60 200 na/ o c inverting input bias current common-mode sensitivity ? v cm = 1.8v a 25 - 3 6 a/v ? v cm = 1.8v a 85 - 4 8 a/v ? v cm = 1.2v a -40 - 4 8 a/v inverting input bias current power supply sensitivity ? v ps = 1.8v a 25 - 2 5 a/v ? v ps = 1.8v a 85 - 4 8 a/v ? v ps = 1.2v a -40 - 4 8 a/v HFA1105
3 inverting input resistance c 25 - 60 - ? input capacitance c 25 - 1.6 - pf input voltage common mode range (implied by v io cmrr, +r in , and -i bias cms tests) a 25, 85 1.8 2.4 - v a-40 1.2 1.7 - v input noise voltage density (note 6) f = 100khz b 25 - 3.5 - nv/ hz non-inverting input noise current density (note 6) f = 100khz b 25 - 2.5 - pa/ hz inverting input noise current density (note 6) f = 100khz b 25 - 20 - pa/ hz transfer characteristics open loop transimpedance gain a v = -1 c 25 - 500 - k ? ac characteristics r f = 510 ? , unless otherwise specified -3db bandwidth (v out = 0.2v p-p , note 6) a v = +1, +r s = 510 ? b 25 - 270 - mhz b full - 240 - mhz a v = -1, r f = 425 ? b 25 - 300 - mhz a v = +2 b 25 - 330 - mhz b full - 260 - mhz a v = +10, r f = 180 ? b 25 - 130 - mhz b full - 90 - mhz full power bandwidth (v out = 5v p-p at a v = +2/-1, 4v p-p at a v = +1, note 6) a v = +1, +r s = 510 ? b 25 - 135 - mhz a v = -1 b 25 - 140 - mhz a v = +2 b 25 - 115 - mhz gain flatness (a v = +2, v out = 0.2v p-p , note 6) to 25mhz b 25 - 0.03 - db bfull- 0.04 - db to 75mhz b 25 - 0.11 - db bfull- 0.22 - db gain flatness (a v = +1, +r s = 510 ? , v out = 0.2v p-p , note 6) to 25mhz b 25 - 0.03 - db to 75mhz b 25 - 0.09 - db minimum stable gain a full - 1 - v/v output characteristics a v = +2, r f = 510 ?, unless otherwise specified output voltage swing (note 6) a v = -1, r l = 100 ? a25 3 3.4 - v afull 2.8 3- v output current (note 6) a v = -1, r l = 50 ? a 25, 85 50 60 - ma a -40 28 42 - ma output short circuit current b 25 - 90 - ma closed loop output impedance (note 6) dc b 25 - 0.08 - w second harmonic distortion (v out = 2v p-p , note 6) 10mhz b 25 - -48 - dbc 20mhz b 25 - -44 - dbc third harmonic distortion (v out = 2v p-p , note 6) 10mhz b 25 - -50 - dbc 20mhz b 25 - -45 - dbc reverse isolation (s 12 , note 6) 30mhz b 25 - -55 - db electrical specifications v supply = 5v, a v = +1, r f = 510w, r l = 100w, unless otherwise specified (continued) parameter test conditions (note 3) test level temp. ( o c) min typ max units HFA1105
4 transient characteristics a v = +2, r f = 510 ? , unless otherwise specified rise and fall times v out = 0.5v p-p b 25 - 1.1 - ns b full - 1.4 - ns overshoot (note 4) (v out = 0 to 0.5v, v in t rise = 1ns) +os b 25 - 3 - % -os b 25 - 5 - % overshoot (note 4) (v out = 0.5v p-p , v in t rise = 1ns) +os b 25 - 3 - % -os b 25 - 11 - % slew rate (v out = 4v p-p , a v = +1, +r s = 510 ? ) +sr b 25 - 1000 - v/ s b full - 975 - v/ s -sr (note 5) b 25 - 650 - v/ s b full - 580 - v/ s slew rate (v out = 5v p-p , a v = +2) +sr b 25 - 1400 - v/ s b full - 1200 - v/ s -sr (note 5) b 25 - 800 - v/ s b full - 700 - v/ s slew rate (v out = 5v p-p , a v = -1) +sr b 25 - 2100 - v/ s b full - 1900 - v/ s -sr (note 5) b 25 - 1000 - v/ s b full - 900 - v/ s settling time (v out = +2v to 0v step, note 6) to 0.1% b 25 - 15 - ns to 0.05% b 25 - 23 - ns to 0.02% b 25 - 30 - ns overdrive recovery time v in = 2v b 25 - 8.5 - ns video characteristics a v = +2, r f = 510 ?, unless otherwise specified differential gain (f = 3.58mhz) r l = 150 ? b 25 - 0.02 - % r l = 75 ? b 25 - 0.03 - % differential phase (f = 3.58mhz) r l = 150 ? b 25 - 0.03 - degrees r l = 75 ? b 25 - 0.05 - degrees power supply characteristics power supply range c 25 4.5 - 5.5 v power supply current (note 6) a 25 - 5.8 6.1 ma a full - 5.9 6.3 ma notes: 3. test level: a. production tested; b. typical or guaranteed limi t based on characterization; c. design typical for information only. 4. undershoot dominates for output si gnal swings below gnd (e.g., 0.5v p-p ), yielding a higher overshoot limit compared to the v out = 0 to 0.5v condition. see the ?application in formation? section for details. 5. slew rates are asymmetrical if the output swings below gnd (e.g. a bipolar signal). positive unipolar output signals have sym metric positive and negative slew rates comparable to the +sr s pecification. see the ?application informat ion? section, and the pulse response grap hs for details. 6. see typical performance cu rves for more information. electrical specifications v supply = 5v, a v = +1, r f = 510w, r l = 100w, unless otherwise specified (continued) parameter test conditions (note 3) test level temp. ( o c) min typ max units HFA1105
5 application information optimum feedback resistor although a current feedback amplifier?s bandwidth dependency on closed loop gain isn?t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. this decrease may be minimized by taking advantage of the current feedback amplifier?s unique relationship between bandwidth and r f . all current feedback amplifiers require a feedback resistor, even for unity gain applications, and r f , in conjunction with the internal compensation capac itor, sets the dominant pole of the frequency response. thus, the amplifier?s bandwidth is inversely proportional to r f . the HFA1105 design is optimized for r f = 510 ? at a gain of +2. decreasing r f decreases stability, resulting in excessive peaking and overshoot (note: capacitive feedback will cause the same problems due to the feedback impedance decrease at higher frequencies). at higher gains, how ever, the amplifier is more stable so r f can be decreased in a trade-off of stability for bandwidth. the table below lists recommended r f values for various gains, and the expected bandwidth. for a gain of +1, a resistor ( + r s ) in series with +in is required to reduce gain peaking and increase stability. non-inverting input source impedance for best operation, the dc source impedance seen by the non-inverting input should be 50 ?. this is especially important in inverting gain co nfigurations where the non- inverting input would normally be connected directly to gnd. pulse undershoot and asymmetrical slew rates the HFA1105 utilizes a quasi-complementary output stage to achieve high output current while minimizing quiescent supply current. in this approach, a composite device replaces the traditional pnp pulldown trans istor. the composite device switches modes after crossing 0v, resulting in added distortion for signals swinging below ground, and an increased undershoot on the negat ive portion of the output waveform (see figures 5, 8, and 11). this undershoot isn?t present for small bipolar signals , or large positive signals. another artifact of the composit e device is asymmetrical slew rates for output signals with a negative voltage component. the slew rate degrades as th e output signal crosses through 0v (see figures 5, 8, and 11), resulting in a slower overall negative slew rate. positive only signals have symmetrical slew rates as illustrated in the large signal positive pulse response graphs (see figures 4, 7, and 10). pc board layout the amplifier?s frequency response depends greatly on the care taken in designing the pc board. the use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! attention should be given to decoupling the power supplies. a large value (10 f) tantalum in parallel with a small value (0.1 f) chip capacitor works well in most cases. terminated microstrip signal lines are recommended at the device?s input and output connections. capacitance, parasitic or planned, connected to the output must be minimized, or isolated as discussed in the next section. care must also be taken to minimize the capacitance to ground at the amplifier?s inverting input (-in), as this capacitance causes gain peaki ng, pulse overshoot, and if large enough, instability. to reduce this capacitance, the designer should remove the ground plane under traces connected to -in, and keep connections to -in as short as possible. an example of a good high frequency layout is the evaluation board shown in figure 2. driving capacitive loads capacitive loads, such as an a/d input, or an improperly terminated transmission line will degrade the amplifier?s phase margin resulting in frequency response peaking and possible oscillations. in most cases, the oscillation can be avoided by placing a resistor (r s ) in series with the output prior to the capacitance. figure 1 details starting points for the selection of this resistor. the points on the curve indicate the r s and c l combinations for the optimum bandwidth, stability, and settling time, but ex perimental fine tuning is recommended. picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. r s and c l form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 270mhz (for a v = +1). by decreasing r s as c l increases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. in spite of this, the bandwidth decreases as the load capacitanc e increases. for example, at a v = +1, r s = 62 ? , c l = 40pf, the overall bandwidth is limited to 180mhz, and bandwidth drops to 75mhz at a v = +1, r s =8 ? , c l = 400pf. gain (a cl )r f ( ? ) bandwidth (mhz) -1 425 300 +1 510 (+r s = 510 ? ) 270 +2 510 330 +5 200 300 +10 180 130 HFA1105
6 evaluation board the performance of the HFA1105 may be evaluated using the hfa11xx evaluation board and a soic to dip adaptor like the aries electronics part number 14-350000-10. the layout and schematic of the board are shown in figure 2. to order evaluation boards (part number hfa11xxeval), please contact your local sales office. 0 100 200 300 400 0 10 20 30 40 50 load capacitance (pf) series output resistance ( ? ) a v = +1 a v = +2 150 250 350 50 figure 1. recommended seri es output resistor vs load capacitance v h +in v l v+ gnd 1 v- out figure 2a. top layout figure 2b. bottom layout 1 2 3 4 8 7 6 5 +5v 10 f 0.1 f v h 50 ? gnd gnd r 1 -5v 0.1 f 10 f 50 ? in out v l 510 510 figure 2. evaluation board schematic and layout figure 2c. schematic HFA1105
7 typical performance curves v supply = 5v, r f = 510 ?, t a = 25 o c, r l = 100 ?, unless otherw ise specified figure 3. small signal pulse response figur e 4. large signal positive pulse response figure 5. large signal bipolar pulse respo nse figure 6. small signal pulse response figure 7. large signal positive pulse response f igure 8. large signal bipolar pulse response time (5ns/div.) output voltage (mv) 200 150 100 50 0 -50 -100 -150 -200 a v = +1 +r s = 510 ? time (5ns/div.) output voltage (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 a v = +1 +r s = 510 ? time (5ns/div.) output voltage (v) 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 a v = +1 +r s = 510 ? output voltage (mv) 200 150 100 50 0 -50 -100 -150 -200 time (5ns/div.) a v = +2 output voltage (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 time (5ns/div.) a v = +2 a v = +2 time (5ns/div.) output voltage (v) 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 HFA1105
8 figure 9. small signal pulse response figur e 10. large signal positive pulse response figure 11. large signal bipolar pulse response figure 12. frequency response figure 13. frequency response figure 14. frequency response for various output voltages typical performance curves v supply = 5v, r f = 510 ?, t a = 25 o c, r l = 100 ?, unless otherw ise specified (continued) output voltage (mv) 200 150 100 50 0 -50 -100 -150 -200 time (5ns/div.) a v = +10 r f = 180 ? time (5ns/div.) output voltage (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 a v = +10 r f = 180 ? time (5ns/div.) o utput v o lta g e ( v ) 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 a v = +10 r f = 180 ? 3 0 -3 0.3 1 10 100 500 270 180 90 0 a v = +1 frequency (mhz) gain (db) normalized phase (degrees) a v = -1 a v = -1 a v = +1 v out = 200mv p-p +r s = 510 ? (+1) +r s = 0 ? (-1) 3 0 -3 0.3 1 10 100 500 270 180 90 0 frequency (mhz) normalized gain (db) phase (degrees) a v = +2 a v = +10 a v = +2 a v = +5 a v = +10 a v = +5 v out = 200mv p-p r f = 510 ? (+2) r f = 200 ? (+5) r f = 180 ? (+10) a v = +2 3 0 -3 0.3 1 10 100 500 270 180 90 0 frequency (mhz) normalized gain (db) phase (degrees) v out = 1.5v p-p v out = 200mv p-p v out = 5v p-p v out = 5v p-p v out = 200mv p-p v out = 1.5v p-p HFA1105
9 figure 15. full power bandwidth figure 16. frequency response for various load resistors figure 17. -3db bandwidth vs temperature figure 18. gain flatness figure 19. reverse isolation figure 20. output impedance typical performance curves v supply = 5v, r f = 510 ?, t a = 25 o c, r l = 100 ?, unless otherw ise specified (continued) v out = 4v p-p (+1) v out = 5v p-p (-1, +2) +r s = 510 ? (+1) 3 0 -3 normalized gain (db) 1 10 100 200 frequency (mhz) a v = -1 a v = +1 a v = +2 r l = 1k ? r l = 500 ? r l = 50 ? r l = 100 ? r l = 50 ? r l = 100 ? r l = 1k ? r l = 500 ? 3 0 -3 0.3 1 100 500 270 180 90 0 frequency (mhz) normalized gain (db) phase (degrees) v out = 200mv p-p a v = +2 10 -100 -50 0 50 100 150 0 100 200 300 400 500 temperature ( o c) bandwidth (mhz) a v = +2 a v = +1 a v = +10 v out = 200mv p-p r f = 180 ? (+10) +r s = 510 ? (+1) 0.25 0.20 0.15 0.10 0.05 0 -0.05 -0.10 11075 v out = 200mv p-p +r s = 510 ? (+1) frequency (mhz) normalized gain (db) a v = +2 a v = +1 -40 -50 -60 -70 -80 -90 0.3 1 10 100 frequency (mhz) reverse isolation (db) v out = 2v p-p a v = +1, +2 a v = -1 1k 100 10 1 0.1 0.01 0.3 1 10 100 frequency (mhz) 1000 output impedance ( ? ) a v = +2 HFA1105
10 figure 21. settling response figure 22. second harmonic distortion vs p out figure 23. third harmonic distortion vs p out figure 24. output voltage vs temperature figure 25. input noise characteristics figure 26. supply current vs supply voltage typical performance curves v supply = 5v, r f = 510 ?, t a = 25 o c, r l = 100 ?, unless otherw ise specified (continued) 0.8 0.6 0.4 0.2 0.1 0 -0.2 -0.4 -0.6 -0.8 3 8 13 18 23 28 33 38 43 48 a v = +2 v out = 2v time (ns) settling error (%) -5 0 5 10 15 -70 -60 -50 -40 -30 output power (dbm) distortion (dbc) a v = +2 10mhz 20mhz -5 0 5 10 15 -70 -60 -50 -40 -30 output power (dbm) distortion (dbc) a v = +2 2 0 m h z 1 0 m h z 3.6 3.5 3.4 3.3 3.2 3.1 2.9 2.8 2.7 2.6 -50 -25 0 25 50 75 100 125 temperature ( o c) output voltage (v) 3.0 +v out (r l = 50 ?) |-v out | (r l = 50 ?) +v out (r l = 100 ?) |-v out | (r l = 100 ?) a v = -1 100 10 1 0.1 1 10 100 10 1 frequency (khz) noise voltage (nv/ hz ) noise current (pa/ hz ) e ni i ni+ i ni- 100 3.544.555.566.577.5 5.6 5.7 5.8 5.9 6.0 6.1 power supply voltage ( v) power supply current (ma) HFA1105
11 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality ce rtifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that da ta sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com die characteristics die dimensions: 59 mils x 59 mils x 19 mils 1500 m x 1500 m x 483 m metallization: type: metal 1: aicu(2%)/tiw thickness: metal 1: 8k ? 0.4k ? type: metal 2: aicu(2%) thickness: metal 2: 16k ? 0.8k ? passivation: type: nitride thickness: 4k ? 0.5k ? transistor count: 75 substrate potential (powered up): floating (recommend connection to v-) metallization mask layout HFA1105 v- nc out +in -in v+ nc HFA1105

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